• real-time embedded systems powered by fpga dynamic partial self-reconfiguration: a case study oriented to biometric recognition applications

    جزئیات بیشتر مقاله
    • تاریخ ارائه: 1392/07/24
    • تاریخ انتشار در تی پی بین: 1392/07/24
    • تعداد بازدید: 1020
    • تعداد پرسش و پاسخ ها: 0
    • شماره تماس دبیرخانه رویداد: -
     this work aims to pave the way for an efficient open system architecture applied to embedded electronic applications to manage the processing of computationally complex algorithms at real-time and low-cost. the target is to define a standard architecture able to enhance the performance-cost trade-off delivered by other alternatives nowadays in the market like general-purpose multi-core processors. our approach, sustained by hardware/software (hw/sw) co-design and run-time reconfigurable computing, is synthesizable in sram-based programmable logic. as proof-of-concept, a run-time partially reconfigurable field-programmable gate array (fpga) is addressed to carry out a specific application of high-demanding computational power such as an automatic fingerprint authentication system (afas). biometric personal recognition is a good example of compute-intensive algorithm composed of a series of image processing tasks executed in a sequential order. in our pioneer conception, these tasks are partitioned and synthesized first in a series of coprocessors that are then instantiated and executed multiplexed in time on a partially reconfigurable region of the fpga. the implementation benchmark of the afas either as a pure software approach on a pc platform under a dual-core processor (intel core 2 duo t5600 at 1.83 ghz) or as a reconfigurable fpga co-design (identical algorithm partitioned in hw/sw tasks operating at 50 or 100 mhz on the second smallest device of the xilinx virtex-4 lx family) highlights a speed-up of one order of magnitude in favor of the fpga alternative. these results let point out biometric recognition as a sensible killer application for run-time reconfigurable computing, mainly in terms of efficiently balancing computational power, functional flexibility and cost. such features, reached through partial reconfiguration, are easily portable today to a broad range of embedded applications with identical system architecture.

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