evaluation and comparison of cmos logic circuits with cntfet

in this paper, a comparison between cmos and mosfet base circuits hspice is done with software. 0.13𝛍 cmos transistor model for simulation and cntfet model of stanford university used. in simulations amounts of power, circuit delay and pdp is calculated and these values were compared at the end. and tried to cntfet applications of transistors in circuit design, including memory and logic circuits ternary be expressed.